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PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
Rev. 01 -- 26 February 2010 Objective data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in TO220 package qualified to 175 C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment.
1.2 Features and benefits
High efficiency due to low switching and conduction losses Suitable for logic level gate drive sources
1.3 Applications
DC-to-DC converters Load switiching Motor control Server power supplies
1.4 Quick reference data
Table 1. VDS ID Ptot Tj Quick reference Conditions Tmb = 25 C; VGS = 10 V; see Figure 1 Tmb = 25 C; see Figure 2
[1]
Symbol Parameter drain current total power dissipation junction temperature
Min -55
Typ -
Max 30 100 170 175 300
Unit V A W C mJ
drain-source voltage Tj 25 C; Tj 175 C
Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Dynamic characteristics QGD QG(tot) gate-drain charge total gate charge VGS = 4.5 V; ID = 25 A; VDS = 15 V; see Figure 14 and 15 VGS = 10 V; ID = 25 A; Tj = 25 C; see Figure 12
[2]
VGS = 10 V; Tj(init) = 25 C; ID = 100 A; Vsup 30 V; RGS = 50 ; unclamped
-
-
8 32
-
nC nC
Static characteristics RDSon drain-source on-state resistance 2.3 2.7 m
[1] [2]
Continuous current is limited by package. Measured 3 mm from package.
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
2. Pinning information
Table 2. Pin 1 2 3 mb Pinning information Symbol G D S D Description gate drain source mounting base; connected to drain
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
123
SOT78 (TO-220AB)
3. Ordering information
Table 3. Ordering information Package Name PSMN2R7-30PL TO-220AB Description Version plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78 TO-220AB Type number
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
2 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
4. Limiting values
Table 4. Symbol VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM EDS(AL)S Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature source current peak source current Tmb = 25 C; tp 10 s; pulsed; Tmb = 25 C
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions Tj 25 C; Tj 175 C Tj 25 C; Tj 175 C; RGS = 20 k VGS = 10 V; Tmb = 100 C; see Figure 1 VGS = 10 V; Tmb = 25 C; see Figure 1 tp 10 s; pulsed; Tmb = 25 C; see Figure 3 Tmb = 25 C; see Figure 2
[1] [1]
Min -20 -55 -55 -
Max 30 30 20 100 100 730 170 175 175 100 730 300
Unit V V V A A A W C C A A mJ
Source-drain diode
Avalanche ruggedness non-repetitive VGS = 10 V; Tj(init) = 25 C; ID = 100 A; Vsup 30 V; drain-source avalanche RGS = 50 ; unclamped energy
[1]
Continuous current is limited by package.
200 ID (A) 150
003aad358
120 Pder (%) 80
03aa16
(1)
100
40
50
0 0 50 100 150 Tmb (C) 200
0 0 50 100 150 Tmb (C) 200
Fig 1.
Continuous drain current as a function of mounting base temperature
Fig 2.
Normalized total power dissipation as a function of mounting base temperature
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
3 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
103 10 s ID (A) 102
(1)
003aad382
Limit RDSon = VDS / ID
100 s DC
10
1 ms 10 ms 100 ms
1 10-1
1
10
VDS (V)
102
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5. Symbol Rth(j-mb) Thermal characteristics Parameter Conditions Min Typ 0.54 Max 0.88 Unit K/W thermal resistance from see Figure 4 junction to mounting base
1 Zth(j-mb) = 0.5 (K/W) 0.2 10-1 0.1 0.05 0.02 10-2
P
003aad355
=
tp T
10-3 single shot
tp T t
10-4
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration; typical values
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
4 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
6. Characteristics
Table 6. Symbol V(BR)DSS VGS(th) Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 250 A; VGS = 0 V; Tj = 25 C ID = 250 A; VGS = 0 V; Tj = -55 C ID = 1 mA; VDS = VGS; Tj = 25 C; see Figure 10 and 11 ID = 1 mA; VDS = VGS; Tj = 175 C; see Figure 11 ID = 1 mA; VDS = VGS; Tj = -55 C; see Figure 11 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VDS = 30 V; VGS = 0 V; Tj = 25 C VDS = 30 V; VGS = 0 V; Tj = 125 C VGS = 16 V; VDS = 0 V; Tj = 25 C VGS = -16 V; VDS = 0 V; Tj = 25 C VGS = 4.5 V; ID = 25 A; Tj = 25 C; see Figure 12 VGS = 10 V; ID = 25 A; Tj = 100 C; see Figure 13 VGS = 10 V; ID = 25 A; Tj = 25 C; see Figure 12 RG QG(tot) gate resistance total gate charge f = 1 MHz ID = 25 A; VDS = 15 V; VGS = 10 V; see Figure 14 and 15 ID = 0 A; VDS = 0 V; VGS = 10 V QGS QGS(th) QGS(th-pl) QGD VGS(pl) Ciss Coss Crss td(on) tr td(off) tf gate-source charge pre-threshold gate-source charge post-threshold gate-source charge gate-drain charge gate-source plateau voltage input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time VDS = 12 V; RL = 0.5 ; VGS = 4.5 V; RG(ext) = 4.7 VDS = 15 V VDS = 12 V; VGS = 0 V; f = 1 MHz; Tj = 25 C; see Figure 16 ID = 25 A; VDS = 15 V; VGS = 4.5 V; see Figure 14 and 15 Dynamic characteristics 66 60 32 12 6.4 5.6 8 2.7 3950 820 360 46 80 75 35 nC nC nC nC nC nC nC V pF pF pF ns ns ns ns
[2]
Min 30 27 1.3 0.5 -
Typ 1.7 2.9 2.3 1
Max 2.15 2.45 2 60 100 100 3.6 3.5 2.7 -
Unit V V V V V A A nA nA m m m
Static characteristics
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
5 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
Table 6. Symbol VSD trr Qr
[1] [2]
Characteristics ...continued Parameter source-drain voltage reverse recovery time recovered charge Conditions IS = 25 A; VGS = 0 V; Tj = 25 C; see Figure 17 IS = 25 A; dIS/dt = -100 A/s; VGS = 0 V; VDS = 12 V Min Typ 0.8 40 33 Max 1.2 Unit V ns nC
Source-drain diode
Tested to JEDEC standards where applicable. Measured 3 mm from package.
120 ID (A) 90 10 4.5 3.5
003aad404
100 ID (A) 80
003aad406
VGS (V) = 3
60 60 2.8 40 30 2.6 20 2.4 0 0 1 2 VDS (V) 3 0 0 1 2 3 VGS (V) 4 Tj = 175 C Tj = 25 C
Fig 5.
Output characteristics: drain current as a function of drain-source voltage; typical values
003aad410
Fig 6.
Transfer characteristics: drain current as a function of gate-source voltage; typical values
003aad411
8000 C (pF) 6000
180 gfs (S) 150
Ciss 120
4000
Crss
90
60 2000 30
0 0 3 6 9 VGS (V) 12
0 0 25 50 75 ID (A) 100
Fig 7.
Input and reverse transfer capacitances as a function of gate-source voltage; typical values
Fig 8.
Forward transconductance as a function of drain current; typical values
(c) NXP B.V. 2010. All rights reserved.
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
Objective data sheet
Rev. 01 -- 26 February 2010
6 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
10 RDSon (m) 8
003aad412
10-1 ID (A) 10-2 min typ
003aab271
max
6
10-3
4
10-4
2
10-5
0 0 5 10 15 VGS (V) 20
10-6 0 1 2 VGS (V) 3
Fig 9.
Drain-source on-state resistance as a function of gate-source voltage; typical values
003a a c982
Fig 10. Sub-threshold drain current as a function of gate-source voltage
10 RDSon (m) 8
003aad405
3 VGS (th) (V) 2 typ min
VGS (V) = 2.8
3
max
6
4
3.5
1
2 10 4.5
0 -60
0
0
60
120
Tj (C)
180
0
20
40
60
80
ID (A)
100
Fig 11. Gate-source threshold voltage as a function of junction temperature
Fig 12. Drain-source on-state resistance as a function of drain current; typical values
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
7 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
2 a 1.5
03aa27
VDS ID VGS(pl)
1
VGS(th) VGS
0.5
QGS1
QGS2 QGD QG(tot)
003aaa508
QGS
0 -60
0
60
120
Tj (C)
180
Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature
10 VGS (V) 8 6V
003aad408
Fig 14. Gate charge waveform definitions
104 C (pF)
003aad409
Ciss
6
24 V VDS = 15 V 103 Coss Crss
4
2
0 0 20 40 60 QG (nC) 80
102 10-1
1
10
VDS (V)
102
Fig 15. Gate-source voltage as a function of gate charge; typical values
Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
8 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
100 IS (A) 80
003aad407
60
40 Tj = 175 C 20 Tj = 25 C 0 0 0.2 0.4 0.6 0.8 VSD (V) 1
Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
9 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
7. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78
E p
A A1 q
D1
mounting base
D
L1(1)
L2(1) Q
L
b1(2) (3x) b2(2) (2x)
1 2 3
b(3x) e e
c
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 4.7 4.1 A1 1.40 1.25 b 0.9 0.6 b1(2) 1.6 1.0 b2(2) 1.3 1.0 c 0.7 0.4 D 16.0 15.2 D1 6.6 5.9 E 10.3 9.7 e 2.54 L 15.0 12.8 L1(1) 3.30 2.79 L2(1) max. 3.0 p 3.8 3.5 q 3.0 2.7 Q 2.6 2.2
Notes 1. Lead shoulder designs may vary. 2. Dimension includes excess dambar. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC 3-lead TO-220AB JEITA SC-46 EUROPEAN PROJECTION ISSUE DATE 08-04-23 08-06-13
Fig 18. Package outline SOT78 (TO-220AB)
PSMN2R7-30PL_1 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
10 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
8. Revision history
Table 7. Revision history Release date 20100226 Data sheet status Objective data sheet Change notice Supersedes Document ID PSMN2R7-30PL_1
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
11 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
9. Legal information
9.1 Data sheet status
Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Document status [1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer's third party customer(s) (hereinafter both referred to as "Application"). It is customer's sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
9.3
Disclaimers
Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
12 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
whenever customer uses the product for automotive applications beyond NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications.
Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the product for such automotive applications, use and specifications, and (b)
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS -- is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
PSMN2R7-30PL_1
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 01 -- 26 February 2010
13 of 14
NXP Semiconductors
PSMN2R7-30PL
N-channel 30 V 2.7 m logic level MOSFET
11. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 26 February 2010 Document identifier: PSMN2R7-30PL_1

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